Top Senior Level Python Jobs in San Francisco Bay Area

As a Sr. Software Engineer on the Bidding Intelligence group at Liftoff, you will build deep learning models for accurate bidding decisions, work with a team of ML and Software Engineers, design and implement scalable systems, and achieve core business objectives using ML technologies.

Seeking a Site Reliability Engineer to design and implement SRE practices and ensure availability and scalability of production systems

As an Infrastructure Software Engineer at Whatnot, you will be responsible for building and scaling the live streaming and marketplace service, ensuring reliability, scalability, and performance of systems. You will work in a remote-first team environment with a focus on high-impact solutions and growth mindset.

Guide the technical design, implementation, and optimization of global infrastructure services with a focus on Hybrid Cloud initiative. Research and recommend new technology, ensure architecture provides reliability and redundancy, manage projects, automate operational activities, and ensure legal compliance in infrastructure area.

Noyo is looking for a Senior Software Engineer to join their Send Team. This team is responsible for building out the architecture and applications to support Noyo's carrier network expansion. The engineer will design, build, and maintain services, tools, and products owned by the team. They will collaborate with other engineers, product managers, and stakeholders to develop and launch new features. The ideal candidate has experience building web applications, working in an agile environment, and preferably has knowledge in employee benefits or healthcare industry standards. A minimum of 7 years of professional experience or a relevant engineering degree is required.

Seeking a Staff Software Engineer to build software solutions for automating and streamlining processes in healthcare laboratories. The role involves working on systems that support the processing of multi-cancer early detection blood tests. Requires onsite presence in Menlo Park, CA two days a week.

Design Verification Engineer III at eInfochips Inc with 8+ years of experience in System Verilog and UVM. Responsibilities include verification cycle, VIP development, debug, assertions coding, gate level simulations, and more. Full-time position with competitive compensation and benefits. Location in Mountain View, CA with potential for remote work.