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Tenstorrent Inc.

CPU Workload Performance Optimization Engineer

Job Posted 13 Days Ago Posted 13 Days Ago
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Remote
Hiring Remotely in United States
Senior level
Remote
Hiring Remotely in United States
Senior level
The CPU Workload Performance Optimization Engineer analyzes, tunes, and optimizes CPU workloads for next-gen architectures, collaborating with hardware and software teams to enhance efficiency.
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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are seeking a CPU Workload Performance Optimization Engineer to drive the characterization, analysis, and optimization of CPU workloads for Tenstorrent’s cutting-edge processor products. In this role, you will work closely with architects, hardware designers, and software engineers to analyze CPU applications, enhance compilers and runtimes, and drive workload performance optimizations. Your contributions will directly shape the design and implementation of next-generation high-performance computing platforms across a diverse set of workloads.

This role is open to Santa Clara, CA, Austin, TX, Boston, MA, Toronto, ON, Ottawa, ON, or open to Remote in North America.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.


Responsibilities:

  • Conduct competitive analysis to evaluate the strengths and weaknesses of compilers and runtimes for key workloads
  • Analyze binary disassemblies and instruction traces to identify inefficiencies in RISC-V compiler and/or runtime optimizations.
  • Propose and prototype new performance optimization features in RISC-V compilers and/or runtimes.
  • Optimize key workload performance by fine-tuning compiler flags and runtime configurations.
  • Develop handwritten kernels using intrinsic programming or assembly to enhance performance on existing hardware.
  • Build and enhance open-source tools to automate binary code quality checks or instrument binaries for performance analysis.
  • Publish performance tuning guidelines and best practices for internal teams, external developers, and customers.
  • Stay up to date with industry trends, emerging workloads, and advancements in compiler optimization techniques.


Experience & Qualifications:

  • Ph.D. in Computer Engineering, Electrical Engineering, or a related field.
  • Strong research background in static or dynamic compilation techniques, focusing on middle-end and/or backend optimization.
  • Deep expertise in GCC, LLVM, or JIT compiler design, development, and optimization.
  • Extensive experience in workload performance bottleneck troubleshooting and mitigation.
  • Solid background in handwritten kernel development using intrinsic or assembly programming.
  • Strong understanding of CPU microarchitecture, including superscalar pipelines, speculative execution, SIMD, and memory hierarchy.
  • In-depth knowledge of operating system internals and GNU libraries.
  • Proficiency in C/C++, intrinsic/assembly programming, and scripting languages such as Python and Shell.
  • Excellent problem-solving and communication skills, with the ability to work across multidisciplinary teams.
  • Experience with compute library kernel development.
  • Knowledge of vector-length agnostic programming.
  • Experience with binary instrumentation or binary translation.
  • Expertise in memory management and data layout optimization.


Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

Top Skills

C,C++,Python,Shell,Perf,Vtune,Amduprof,Gcc,Llvm

Tenstorrent Inc. Santa Clara, California, USA Office

Santa Clara, California, United States

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