Wireless Design Verification Engineer

Sorry, this job was removed at 02:53 p.m. (PST) on Wednesday, Aug 21, 2024
Be an Early Applicant
Sunnyvale, CA
3-5 Years Experience
Hardware • Retail • Software • Wearables
The Role

Summary

Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.

As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of communication subsystem including MAC, PHY, and interfaces. With deep understanding of communication systems and protocols, you will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification.

Key Qualifications

BS and 3+ years of relevant industry experience.

Wireless/Wired communication block/system verification experience.

Advanced knowledge of SystemVerilog and DV methodology.

Solid verification skills in problem solving, constrained random testing, and debugging.

Verification experience of one or more of the following: MAC, PHY, DMA, timer, AMBA bus and fabric, encryption/decryption engine.

Knowledge of wireless protocols such as Bluetooth, WLAN, or Zigbee a plus.

Experience with SystemVerilog Assertion (SVA) a plus.

Should be a great teammate with excellent communication skills and the desire to take on diverse challenges.

Description

- Understand details of microarchitecture and build verification plan from specification, review and refine to achieve coverage targets.

- Build block / subsystem / chip level testbench using best in class DV methodology.

- Architect testbench with maximum reusability in mind, and create UVM libraries.

- Generate directed and constrained random tests.

- Debug failures, manage bug tracking, and close coverage.

- Create and analyze block/subsystem level coverage model, and add test cases to increase coverage.

- Work closely with team members to improve methodology, and flow.

Education & Experience

BS and 3+ years of relevant industry experience

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
The Company
Cupertino
165,000 Employees
On-site Workplace
Year Founded: 1976

What We Do

We’re a diverse collective of thinkers and doers, continually reimagining what’s possible to help us all do what we love in new ways. The people who work here have reinvented entire industries with the Mac, iPhone, iPad, and Apple Watch, as well as with services, including Apple TV, the App Store, Apple Music, and Apple Pay. And the same innovation

Gallery

Gallery

Similar Companies Hiring

Lily AI Thumbnail
Retail • Generative AI • eCommerce • Computer Vision • Artificial Intelligence • Analytics
Mountain View, CA
82 Employees
Resident Thumbnail
Retail • Manufacturing • eCommerce
San Francisco, CA
322 Employees
Tarro Thumbnail
Software • Payments • Information Technology • Hospitality • Food
Menlo Park, CA
1300 Employees

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account