Dojo AI Interconnect Fabric Hardware, Software Engineer

| Palo Alto, CA, USA
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The Role

The Dojo ExaFLOP-scale deep learning accelerator demands data transmission capabilities beyond what software-based TCP/IP can offer, requiring high bandwidth, high efficiency and extremely low latency to enable training of next-generation networks at high performance. To meet this challenge, the Dojo Fabric Team designs and deploys a custom hardware-based networking stack achieving these objectives by tightly integrating custom silicon, network protocols, FPGAs, software, PCBs, NICs, and machine learning algorithms.

We are looking for an outstanding engineer to support hardware and software vertical integration across many parts of the technical stack. Responsibilities will be tailored to your skillset and interests.

Responsibilities

  • Develop C/C++ firmware drivers and software to interface with the network accelerators
  • Customize pytorch/python and C++ libraries
  • Develop low-level Linux kernel drivers
  • Write python code to automate hardware and software deployment
  • Design PCB network interface cards (NIC)
  • Write and debug systemverilog / verilog for ASICs and FPGAs
  • Physically and deploy custom electronic systems in the supercomputer server rooms
  • Develop test environments, regressions, infrastructure, and methodology
  • Create directed and random test sequences to exercise the design.
  • Execute pytorch / python machine learning algorithms on the Dojo supercomputer

Requirements

  • Bachelor's Degree in Computer Science, experience with evidence of exceptional ability, or equivalent
  • 3-5+ (Senior) or 10+ (Staff) years of experience in software, Verilog, or firmware development in robotics, silicon, real-time controls, machine learning accelerators, network switches, fabrics, transport protocols, operating systems, or system software
  • Foundations in Machine Learning and enthusiasm for AI
  • Compiled languages (C/C++, Rust, Golang, etc.)
  • Scripting languages (python, perl, etc.)
  • HDL languages (Verilog, System Verilog, VHDL)
  • Proficient in debugging complex designs
  • Deep knowledge in advanced computer architecture, micro-architecture concepts, and embedded systems
  • Able to work in a fast-paced team and environment
  • Is not an LLM

Compensation and Benefits

Benefits

Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:

  • Aetna PPO and HSA plans > 2 medical plan options with $0 payroll deduction
  • Family-building, fertility, adoption and surrogacy benefits
  • Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
  • Company Paid (Health Savings Account) HSA Contribution when enrolled in the High Deductible Aetna medical plan with HSA
  • Healthcare and Dependent Care Flexible Spending Accounts (FSA)
  • LGBTQ+ care concierge services
  • 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
  • Company paid Basic Life, AD&D, short-term and long-term disability insurance
  • Employee Assistance Program
  • Sick and Vacation time (Flex time for salary positions), and Paid Holidays
  • Back-up childcare and parenting support resources
  • Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
  • Weight Loss and Tobacco Cessation Programs
  • Tesla Babies program
  • Commuter benefits
  • Employee discounts and perks program
    • Expected Compensation

      $104,000 - $348,000/annual salary + cash and stock awards + benefits

      Pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The total compensation package for this position may also include other elements dependent on the position offered. Details of participation in these benefit plans will be provided if an employee receives an offer of employment.

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Location

3500 Deer Creek Road, Palo Alto, CA 94304

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